Hardware - constrained Packet Classification – Mgr. David Antoš, Ph.D.
Mgr. David Antoš, Ph.D.
Doctoral thesis
Hardware - constrained Packet Classification
Hardware - constrained Packet Classification
Abstract:
The goal of this work is to propose a unified packet classification method combining routing, level 3-to-level 2 address translation (ARP), and packet filtering, that can be implemented on a single packet classification unit with a content addressable memory (CAM) and a static RAM. As the target architecture of this work is a general purpose computer equipped with a hardware acceleration card and the …more
Language used: English
Date on which the thesis was submitted / produced: 22. 9. 2006
Identifier:
https://is.muni.cz/th/xeru6/
Thesis defence
- Date of defence: 12. 10. 2006
- Supervisor: prof. RNDr. Luděk Matyska, CSc.
Citation record
Full text of thesis
Contents of on-line thesis archive
Published in Theses:- světu
Other ways of accessing the text
Institution archiving the thesis and making it accessible: Masarykova univerzita, Fakulta informatikyMasaryk University
Faculty of InformaticsDoctoral programme / field:
Informatics / Informatics
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