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Mgr. Maruthi Gillela

Master's thesis

Parallelization of brute force attack on MD5 hash algorithm in FPGA

Parallelization of brute force attack on MD5 hash algorithm in FPGA
Abstract:
FPGA implementation of MD5 hash algorithm is faster when compared to software implementation, but brute-force attack on MD5 still needs 2^(128) iterations theoretically. This work will explore the possibilities of improving the speed of brute-force attack on FPGA implementation of MD5 algorithm. The student will propose a design/method in FPGA to parallelize the search for a password that was hashed …more
Abstract:
FPGA implementation of MD5 hash algorithm is faster when compared to software implementation, but brute-force attack on MD5 still needs 2^(128) iterations theoretically. This work will explore the possibilities of improving the speed of brute-force attack on FPGA implementation of MD5 algorithm. The student will propose a design/method in FPGA to parallelize the search for a password that was hashed …more
 

Keywords

LUT HDL GPU IP core AXI Bus
 
Language used: English
Date on which the thesis was submitted / produced: 13. 12. 2018
Identifier: https://is.muni.cz/th/xa53n/

Thesis defence

  • Date of defence: 1. 2. 2019
  • Supervisor: prof. Ing. Václav Přenosil, CSc.
  • Reader: RNDr. Zdeněk Matěj, Ph.D.

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Institution archiving the thesis and making it accessible: Masarykova univerzita, Fakulta informatiky
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